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1 Typical On Resistance, 5 V, +12 V, +5 V, and +3.3 V, 4:1 Multiplexer ADG1604
FEATURES
1 typical on resistance 0.2 on resistance flatness 3.3 V to 8 V dual supply operation 3.3 V to 16 V single supply operation No VL supply required 3 V logic-compatible inputs Rail-to-rail operation Continuous current per channel LFCSP package: 504 mA TSSOP package: 315 mA 14-lead TSSOP and 16-lead, 4 mm x 4 mm LFCSP
FUNCTIONAL BLOCK DIAGRAM
ADG1604
S1 S2 D S3 S4 1 OF 4 DECODER
07982-001
A0
A1
EN
Figure 1.
APPLICATIONS
Communication systems Medical systems Audio signal routing Video signal routing Automatic test equipment Data acquisition systems Battery-powered systems Sample-and-hold systems Relay replacements
GENERAL DESCRIPTION
The ADG1604 is a complementary metal-oxide semiconductor (CMOS) analog multiplexer and switches one of four inputs to a common output, D, as determined by the 3-bit binary address lines, A0, A1, and EN. Logic 0 on the EN pin disables the device. Each switch conducts equally well in both directions when on and has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked. All switches exhibit break-before-make switching action. Inherent in the design is low charge injection for minimum transients when switching the digital inputs. The ultralow on resistance of these switches make them ideal solutions for data acquisition and gain switching applications where low on resistance and distortion is critical. The on resistance profile is very flat over the full analog input range, ensuring excellent linearity and low distortion when switching audio signals. The CMOS construction ensures ultralow power dissipation, making the parts ideally suited for portable and batterypowered instruments.
PRODUCT HIGHLIGHTS
1. 2. 3. 4. 5. 6. 1.6 maximum on resistance over temperature. Minimum distortion: THD + N = 0.007%. 3 V logic-compatible digital inputs: VINH = 2.0 V, VINL = 0.8 V. No VL logic power supply required. Ultralow power dissipation: <16 nW. 14-lead TSSOP and 16-lead, 4 mm x 4 mm LFCSP.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2009 Analog Devices, Inc. All rights reserved.
ADG1604 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 5 V Dual Supply ......................................................................... 3 12 V Single Supply ........................................................................ 4 5 V Single Supply .......................................................................... 5 3.3 V Single Supply ....................................................................... 6 Continuous Current per Channel, S or D ..................................7 Absolute Maximum Ratings ............................................................8 ESD Caution...................................................................................8 Pin Configurations and Function Descriptions ............................9 Typical Performance Characteristics ........................................... 10 Test Circuits ..................................................................................... 13 Terminology .................................................................................... 16 Outline Dimensions ....................................................................... 17 Ordering Guide .......................................................................... 17
REVISION HISTORY
1/09--Revision 0: Initial Version
Rev. 0 | Page 2 of 20
ADG1604 SPECIFICATIONS
5 V DUAL SUPPLY
VDD = +5 V 10%, VSS = -5 V 10%, GND = 0 V, unless otherwise noted. Table 1.
Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 1 Transition Time, tTRANSITION tON (EN) tOFF (EN) Break-Before-Make Time Delay, tD Charge Injection Off Isolation Channel-to-Channel Crosstalk Total Harmonic Distortion + Noise (THD + N) -3 dB Bandwidth CS (Off ) CD (Off ) CD, CS (On) POWER REQUIREMENTS IDD VDD/VSS
1
25C
-40C to +85C
-40C to +125C VDD to VSS
Unit V typ max typ max typ max nA typ
Test Conditions/Comments
1 1.2 0.04 0.08 0.2 0.25 0.1 0.2 0.1 0.2 0.2 0.4
1.4 0.09 0.29
1.6 0.1 0.34
VS = 4.5 V, IS = -10 mA; see Figure 22 VDD = 4.5 V, VSS = 4.5 V VS = 4.5 V, IS = -10 mA VS = 4.5 V, IS = -10 mA VDD = +5.5 V, VSS = -5.5 V VS = 4.5 V, VD = 4.5 V; see Figure 23 VS = 4.5V, VD = 4.5 V; see Figure 23 VS = VD = 4.5 V; see Figure 24
1 2 2
8 16 16 2.0 0.8
nA max nA typ nA max nA typ nA max V min V max A typ A max pF typ ns typ ns max ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ % typ MHz typ pF typ pF typ pF typ A typ A max V min/max
0.005 0.1 8 150 278 116 146 186 234 50 140 70 70 0.007 15 63 270 360 0.001 1.0 3.3/8
VIN = VGND or VDD
336 166 277
376 177 310 28.5
RL = 300 , CL = 35 pF VS = 2.5 V; see Figure 29 RL = 300 , CL = 35 pF VS = 2.5 V; see Figure 31 RL = 300 , CL = 35 pF VS = 2.5 V; see Figure 31 RL = 300 , CL = 35 pF VS1 = VS2 = 2.5 V; see Figure 30 VS = 0 V, RS = 0 , CL = 1 nF; see Figure 32 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 25 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 27 RL = 110 , 5 V p-p, f = 20 Hz to 20 kHz; see Figure 28 RL = 50 , CL = 5 pF; see Figure 26 VS = 0 V, f = 1 MHz VS = 0 V, f = 1 MHz VS = 0 V, f = 1 MHz VDD = +5.5 V, VSS = -5.5 V Digital inputs = 0 V or VDD
Guaranteed by design, not subject to production test. Rev. 0 | Page 3 of 20
ADG1604
12 V SINGLE SUPPLY
VDD = 12 V 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 2.
Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 1 Transition Time, tTRANSITION tON (EN) tOFF (EN) Break-Before-Make Time Delay, tD Charge Injection Off Isolation Channel-to-Channel Crosstalk Total Harmonic Distortion + Noise -3 dB Bandwidth CS (Off ) CD (Off ) CD, CS (On) POWER REQUIREMENTS IDD IDD VDD
1
25C
-40C to +85C
-40C to +125C 0 V to VDD
Unit V typ max typ max typ max nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max pF typ ns typ ns max ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ % typ MHz typ pF typ pF typ pF typ A typ A max A typ A max V min/max
Test Conditions/Comments
0.95 1.1 0.03 0.06 0.2 0.23 0.1 0.2 0.1 0.2 0.2 0.4
1.25 0.07 0.27
1.45 0.08 0.32
VS = 0 V to 10 V, IS = -10 mA; see Figure 22 VDD = 10.8 V, VSS = 0 V VS = 10 V, IS = -10 mA VS = 0 V to 10 V, IS = -10 mA VDD = 13.2 V, VSS = 0 V VS = 1 V/10 V, VD = 10 V/1 V; see Figure 23 VS = 1 V/10 V, VD = 10 V/1 V; see Figure 23 VS = VD = 1 V or 10 V; see Figure 24
1 2 2
8 16 16 2.0 0.8
0.001 0.1 8 100 161 80 95 144 173 25 125 70 70 0.013 19 60 270 350 0.001 1 230 360 3.3/16
VIN = VGND or VDD
192 104 205
220 111 234 18
RL = 300 , CL = 35 pF VS = 8 V; see Figure 29 RL = 300 , CL = 35 pF VS = 8 V; see Figure 31 RL = 300 , CL = 35 pF VS = 8 V; see Figure 31 RL = 300 , CL = 35 pF VS1 = VS2 = 8 V; see Figure 30 VS = 6 V, RS = 0 , CL = 1 nF; see Figure 32 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 25 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 27 RL = 110 , 5 Vp-p, f = 20 Hz to 20 kHz; see Figure 28 RL = 50 , CL = 5 pF; see Figure 26 VS = 6 V, f = 1 MHz VS = 6 V, f = 1 MHz VS = 6 V, f = 1 MHz VDD = 12 V Digital inputs = 0 V or VDD Digital inputs = 5 V
Guaranteed by design, not subject to production test. Rev. 0 | Page 4 of 20
ADG1604
5 V SINGLE SUPPLY
VDD = 5 V 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 3.
Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 1 Transition Time, tTRANSITION tON (EN) tOFF (EN) Break-Before-Make Time Delay, tD Charge Injection Off Isolation Channel-to-Channel Crosstalk Total Harmonic Distortion + Noise -3 dB Bandwidth CS (Off ) CD (Off ) CD, CS (On) POWER REQUIREMENTS IDD VDD
1
25C
-40C to +85C
-40C to +125C 0 V to VDD
Unit V typ max typ max typ max nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max pF typ ns typ ns max ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ % typ MHz typ pF typ pF typ pF typ A typ A max V min/max
Test Conditions/Comments
1.7 2.15 0.05 0.09 0.4 0.53 0.05 0.2 0.05 0.2 0.1 0.4
2.4 0.12 0.55
2.7 0.15 0.6
VS = 0 V to 4.5 V, IS = -10 mA; see Figure 22 VDD = 4.5 V, VSS = 0 V VS = 0 V to 4.5 V, IS = -10 mA VS = 0 V to 4.5 V, IS = -10 mA VDD = 5.5 V, VSS = 0 V VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 23 VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 23 VS = VD = 1 V or 4.5 V; see Figure 24
1 2 2
8 16 16 2.0 0.8
0.001 0.1 8 175 283 135 174 228 288 30 70 70 70 0.09 16 70 300 400 0.001 1 3.3/16
VIN = VGND or VDD
337 194 342
380 212 385 21
RL = 300 , CL = 35 pF VS = 2.5 V; see Figure 29 RL = 300 , CL = 35 pF VS = 2.5 V; see Figure 31 RL = 300 , CL = 35 pF VS = 2.5 V; see Figure 31 RL = 300 , CL = 35 pF VS1 = VS2 = 2.5 V; see Figure 30 VS = 2.5 V, RS = 0 , CL = 1 nF; see Figure 32 RL = 50 , CL = 5 pF, f = 100 kHz; see Figure 25 RL = 50 , CL = 5 pF, f = 100 kHz; see Figure 27 RL = 110 , f = 20 Hz to 20 kHz, VS = 3.5 V p-p; see Figure 28 RL = 50 , CL = 5 pF; see Figure 26 VS = 2.5 V, f = 1 MHz VS = 2.5 V, f = 1 MHz VS = 2.5 V, f = 1 MHz VDD = 5.5 V Digital inputs = 0 V or VDD
Guaranteed by design, not subject to production test.
Rev. 0 | Page 5 of 20
ADG1604
3.3 V SINGLE SUPPLY
VDD = 3.3 V, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 4.
Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 1 Transition Time, tTRANSITION tON (EN) tOFF (EN) Break-Before-Make Time Delay, tD Charge Injection Off Isolation Channel-to-Channel Crosstalk Total Harmonic Distortion + Noise -3 dB Bandwidth CS (Off ) CD (Off ) CD, CS (On) POWER REQUIREMENTS IDD VDD
1
25C
-40C to +85C
-40C to +125C 0 V to VDD
Unit V typ max typ max typ max nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max pF typ ns typ ns max ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ % typ MHz typ pF typ pF typ pF typ A typ A max V min/max
Test Conditions/Comments
3.2 3.6 0.06 0.15 1.2 1.6 0.02 0.25 0.02 0.25 0.05 0.6
3.8 0.16 1.7
4 0.17 1.8
VS = 0 V to VDD, IS = -10 mA; see Figure 22 VDD = 3.3 V, VSS = 0 V VS = 0 V to VDD, IS = -10 mA VS = 0 V to VDD, IS = -10 mA VDD = 3.6 V, VSS = 0 V VS = 0.6 V/3 V, VD = 3 V/0.6 V; see Figure 23 VS = 0.6 V/3 V, VD = 3 V/0.6 V; see Figure 23 VS = VD = 0.6 V or 3 V; see Figure 24
1 2 2
8 16 16 2.0 0.8
0.001 0.1 8 280 460 227 308 357 480 25 60 70 70 0.15 15 76 316 420 0.001 1.0 1.0 3.3/16
VIN = VGND or VDD
526 332 549
575 346 601 20
RL = 300 , CL = 35 pF VS = 1.5 V; see Figure 29 RL = 300 , CL = 35 pF VS = 1.5 V; see Figure 31 RL = 300 , CL = 35 pF VS = 1.5 V; see Figure 31 RL = 300 , CL = 35 pF VS1 = VS2 = 1.5 V; see Figure 30 VS = 1.5 V, RS = 0 , CL = 1 nF; see Figure 32 RL = 50 , CL = 5 pF, f = 100 kHz; see Figure 25 RL = 50 , CL = 5 pF, f = 100 kHz; see Figure 27 RL = 110 , f = 20 Hz to 20 kHz, VS = 2 V p-p; see Figure 28 RL = 50 , CL = 5 pF; see Figure 26 VS = 1.5 V, f = 1 MHz VS = 1.5 V, f = 1 MHz VS = 1.5 V, f = 1 MHz VDD = 3.6 V Digital inputs = 0 V or VDD
Guaranteed by design, not subject to production test.
Rev. 0 | Page 6 of 20
ADG1604
CONTINUOUS CURRENT PER CHANNEL, S OR D
Table 5.
Parameter CONTINUOUS CURRENT, S OR D VDD = +5 V, VSS = -5 V TSSOP (JA = 150.4C/W) LFCSP (JA = 48.7C/W) VDD = 12 V, VSS = 0 V TSSOP (JA = 150.4C/W) LFCSP (JA = 48.7C/W) VDD = 5 V, VSS = 0 V TSSOP (JA = 150.4C/W) LFCSP (JA = 48.7C/W) VDD = 3.3 V, VSS = 0 V TSSOP (JA = 150.4C/W) LFCSP (JA = 48.7C/W) 25C 85C 125C Unit
315 504 378 627 249 403 256 410
189 259 221 311 158 224 165 235
95 112 112 126 91 105 98 116
mA maximum mA maximum mA maximum mA maximum mA maximum mA maximum mA maximum mA maximum
Rev. 0 | Page 7 of 20
ADG1604 ABSOLUTE MAXIMUM RATINGS
TA = 25C, unless otherwise noted. Table 6.
Parameter VDD to VSS VDD to GND VSS to GND Analog Inputs 1 Digital Inputs1 Peak Current, S or D Continuous Current, S or D 2 Operating Temperature Range Industrial (Y Version) Storage Temperature Range Junction Temperature 16-Lead TSSOP, JA Thermal Impedance (2-Layer Board) 16-Lead LFCSP, JA Thermal Impedance (4-Layer Board) Reflow Soldering Peak Temperature, Pb free
1
Rating 18 V -0.3 V to +18 V +0.3 V to -18 V VSS - 0.3 V to VDD + 0.3 V or 30 mA, whichever occurs first GND - 0.3 V to VDD + 0.3 V or 30 mA, whichever occurs first 1150 mA (pulsed at 1 ms, 10% duty cycle maximum) Data + 15% -40C to +125C -65C to +150C 150C 150.4C/W 48.7C/W 260C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ESD CAUTION
2
Overvoltages at IN, S, or D are clamped by internal diodes. Current should be limited to the maximum ratings given. See Table 5.
Rev. 0 | Page 8 of 20
ADG1604 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
16 EN 15 A0
PIN 1 INDICATOR
13 NC
14 A1
A0 EN VSS S1 S2 D NC
1 2 3 4 5 6 7
14 13
A1 GND VDD S3
VSS 1 NC 2 S1 3 S2 4
12 GND 11 VDD 10 S3 9 S4
ADG1604
TOP VIEW (Not to Scale)
ADG1604
TOP VIEW (Not to Scale)
12 11 10 9 8
NC 5
S4 NC
07982-002
NC = NO CONNECT
Figure 2. 14-Lead TSSOP Pin Configuration
Figure 3. 16-Lead LFCSP Pin Configuration
Table 7. Pin Function Descriptions
TSSOP 1 2 3 4 5 6 7, 8, 9 10 11 12 13 14 N/A Pin No. LFCSP 15 16 1 3 4 6 2, 5, 7, 8, 13 9 10 11 12 14 17 (EPAD) Mnemonic A0 EN VSS S1 S2 D NC S4 S3 VDD GND A1 EP (EPAD) Description Logic Control Input. Active High Digital Input. When this pin is low, the device is disabled and all switches are off. When this pin is high, the Ax logic inputs determine the on switch. Most Negative Power Supply Potential. Source Terminal. This pin can be an input or output. Source Terminal. This pin can be an input or output. Drain Terminal. This pin can be an input or output. No Connection. Source Terminal. This pin can be an input or output. Source Terminal. This pin can be an input or output. Most Positive Power Supply Potential. Ground (0 V) Reference. Logic Control Input. Exposed Pad. Tied to substrate, VSS.
Table 8. ADG1604 Truth Table
EN 0 1 1 1 1 A1 X 0 0 1 1 A0 X 0 1 0 1 S1 Off On Off Off Off S2 Off Off On Off Off S3 Off Off Off On Off S4 Off Off Off Off On
Rev. 0 | Page 9 of 20
07982-003
NC
NOTES 1. NC = NO CONNECT. 2. EXPOSED PAD TIED TO SUBSTRATE, VSS.
NC 8
NC 7
D6
ADG1604 TYPICAL PERFORMANCE CHARACTERISTICS
1.4
1.4
TA = 25C VDD = +3.3V VSS = -3.3V
VDD = 12V VSS = 0V
1.2
1.2
ON RESISTANCE ()
ON RESISTANCE ()
1.0
VDD = +5V VSS = -5V
1.0
TA = +125C TA = +85C TA = +25C TA = -40C
0.8
VDD = +8V VSS = -8V
0.8
0.6
0.6
07982-014
-6
-4
-2
0
2
4
6
8
0
2
4
6
8
10
12
VS OR VD VOLTAGE (V)
VS OR VD VOLTAGE (V)
Figure 4. On Resistance as a Function of VD (VS) for Dual Supply
Figure 7. On Resistance as a Function of VD (VS) for Different Temperatures, 12 V Single Supply
2.5
3.5
TA = 25C
3.0
VDD = 3.3V VSS = 0V
TA = +125C TA = +85C TA = +25C TA = -40C
VDD = 5V VSS = 0V
ON RESISTANCE ()
2.5
ON RESISTANCE ()
2.0
2.0
VDD = 5V VSS = 0V
1.5
VDD = 12V VSS = 0V
1.5
1.0
VDD = 16V VSS = 0V
1.0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 VS OR VD VOLTAGE (V)
07982-015
0
2
4
6
8
10
12
14
16
VS OR VD VOLTAGE (V)
Figure 5. On Resistance as a Function of VD (VS) for Single Supply
Figure 8. On Resistance as a Function of VD (VS) for Different Temperatures, 5 V Single Supply
4.0 VDD = 3.3V VSS = 0V
1.4
1.2
ON RESISTANCE ()
3.5
ON RESISTANCE ()
1.0
3.0
0.8
2.5
TA = +125C TA = +85C TA = +25C TA = -40C
0.6
VDD = +5V VSS = -5V
07982-012
-4
-2
0
2
4
6
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
VS OR VD VOLTAGE (V)
VS OR VD VOLTAGE (V)
Figure 6. On Resistance as a Function of VD (VS) for Different Temperatures, 5 V Dual Supply
Figure 9. On Resistance as a Function of VD (VS) for Different Temperatures, 3.3 V Single Supply
Rev. 0 | Page 10 of 20
07982-006
0.4 -6
TA = +125C TA = +85C TA = +25C TA = -40C
2.0
1.5
07982-013
0.5
07982-010
0.4 -8
0.4
ADG1604
15 ID, IS (ON) +, + 10 ID (OFF) -, + LEAKAGE CURRENT (nA)
18 16 14 12 10 8 6 4
IS (OFF) +, - ID, IS (OFF) -, - ID (OFF) -, + ID, IS (OFF) +, +
LEAKAGE CURRENT (nA)
5 IS (OFF) +, - 0 IS (OFF) -, + -5 ID, IS (ON) -, - ID (OFF) +, - -10
2 0 -2
IS (OFF) -, + ID (OFF) +, - 0 20 40 60 80 100 120
07982-031
0
20
40
60
80
100
120
TEMPERATURE (C)
07982-033
-15
-4
TEMPERATURE (C)
Figure 10. Leakage Currents as a Function of Temperature, 5 V Dual Supply
20
Figure 13. Leakage Currents as a Function of Temperature, 3.3 V Single Supply
600 IDD PER CHANNEL TA = 25C IDD = +12V ISS = 0V 400
15
ID, IS (ON) +, + LEAKAGE CURRENT (nA)
10
500
ID (OFF) -, +
5 0
IS (OFF) +, -
300
IDD (A)
200 100
IDD = +5V ISS = -5V IDD = +5V ISS = 0V
-5 -10
ID, IS (ON) -, - IS (OFF) -, + ID (OFF) +, -
0 -100 0 2 IDD = +3.3V ISS = 0V 4 6 LOGIC (V) 8 10 12
07982-005 07982-009
0
20
40
60
80
100
120
TEMPERATURE (C)
07982-032
-15
Figure 11. Leakage Currents as a Function of Temperature, 12 V Single Supply
20
350 300
Figure 14. IDD vs. Logic Level
15
LEAKAGE CURRENT (nA)
CHARGE INJECTION (pC)
ID, IS (OFF) +, +
250 200 150
10
ID, IS (OFF) -, -
VDD = +5V VSS = -5V
VDD = +12V VSS = 0V
5
ID (OFF) -, +
100 50 0 -6
VDD = +3.3V VSS = 0V -4 -2 0 2 4 VS (V) 6 8 10 12 14 VDD = +5V VSS = 0V
0
IS (OFF) +, - IS (OFF) -, + ID (OFF) +, - 0 20 40 60 80 100 120
07982-030
-5
TEMPERATURE (C)
Figure 12. Leakage Currents as a Function of Temperature, 5 V Single Supply
Figure 15. Charge Injection vs. Source Voltage
Rev. 0 | Page 11 of 20
ADG1604
450 400
VDD = +3.3V, VSS = 0V -1 0 TA = 25C VDD = +5V VSS = -5V
350 INSERTION LOSS (dB)
-2
300
TIME (ns) VDD = +5V, VSS = 0V
250 200 150 100 50 -40
VDD = +5V, VSS = -5V VDD = +12V, VSS = 0V
07982-019
-3
-4
-5
-20
0
20
40
60
80
100
120
10k
100k
1M
10M
100M
TEMPERATURE (C)
FREQUENCY (Hz)
Figure 16. tON/tOFF Times vs. Temperature
-15 -20 TA = 25C VDD = +5V -25 VSS = -5V -30 -35 -40 -45 -50 -55 -60 -65 -70 -75 -80 -85 -90 -95 -100 -105 -110 1k 10k
Figure 19. On Response vs. Frequency
0 TA = 25C -10 VDD = +5V VSS = -5V -20 -30 NO DECOUPLING CAPACITORS
OFF ISOLATION (dB)
ACPSRR (dB)
-40 -50 -60 -70 -80 -90 DECOUPLING CAPACITORS
07982-007
100k
1M
10M
100M
1G
10k
100k FREQUENCY (Hz)
1M
10M
FREQUENCY (Hz)
Figure 17. Off Isolation vs. Frequency
Figure 20. ACPSRR vs. Frequency
0
0.20
TA = 25C VDD = +5V VSS = -5V
0.18 0.16 0.14
RL = 110 TA = 25C
-20
VDD = +3.3V VS = 2V p-p
CROSSTALK (dB)
-40
THD + N (%)
0.12 0.10 0.08 0.06 0.04 0.02 VDD = +12V VS = 5V p-p VDD = +5V VSS = -5V VS = 5V p-p VDD = +5V VS = 3.5V p-p
-60
-80
-100
07982-018
10k
100k
1M
10M
100M
1G
0
5k
10k FREQUENCY (Hz)
15k
20k
FREQUENCY (Hz)
Figure 18. Crosstalk vs. Frequency
Figure 21. THD + N vs. Frequency
Rev. 0 | Page 12 of 20
07982-017
-120 1k
0
07982-008
-100 1k
07982-004
-6 1k
ADG1604 TEST CIRCUITS
VDD 0.1F VSS 0.1F NETWORK ANALYZER 50 Sx
V
VDD
VSS
50 VS
D
Sx
D IDS
07982-020
GND
RL 50
VOUT
VS
OFF ISOLATION = 20 log
VOUT VS
Figure 22. On Resistance
Figure 25. Off Isolation
VDD 0.1F
VSS 0.1F NETWORK ANALYZER 50
VDD Sx
VSS
VS
D
IS (OFF) A VS Sx D ID (OFF) A VD
07982-021
GND
RL 50
VOUT
INSERTION LOSS = 20 log
VOUT WITH SWITCH VOUT WITHOUT SWITCH
Figure 23. Off Leakage
Figure 26. Bandwidth
VDD 0.1F
VSS 0.1F
NETWORK ANALYZER VOUT RL 50
VDD S1
VSS
D S2 RL 50
VS
ID (ON) NC Sx D A VD
07982-022
GND
NC = NO CONNECT
CHANNEL-TO-CHANNEL CROSSTALK = 20 log
Figure 24. On Leakage
Figure 27. Channel-to-Channel Crosstalk
Rev. 0 | Page 13 of 20
07982-029
VOUT VS
07982-028
07982-027
ADG1604
VDD 0.1F VSS 0.1F AUDIO PRECISION VDD Sx IN D VIN GND RL 110 VOUT
07982-034
VSS RS
VS V p-p
Figure 28. THD + Noise
0.1F
VDD VSS
0.1F ADDRESS DRIVE (VIN) VS1 3V 50% 0V 50%
VIN
VDD VSS S1 A1 S2 A0 S3 S4 2.0V EN GND D RL 300
VS4 VOUT CL 35pF
VOUT
90% 90%
07982-023
tTRANSITION tTRANSITION
Figure 29. Address to Output Switching Times
0.1F
VDD VSS
0.1F
VIN
300
VDD VSS S1 A1 S2 A0 S3 S4 EN GND D RL 300
VS1
ADDRESS DRIVE (VIN)
3V 0V
2.0V
VOUT CL 35pF
VOUT
80%
80%
tBBM
Figure 30. Break-Before-Make Time Delay
Rev. 0 | Page 14 of 20
07982-024
ADG1604
0.1F VDD VSS 0.1F ENABLE DRIVE (VIN) 3V 50% 0V 50%
VDD VSS S1 A1 S2 A0 S3 S4 EN VIN 300 GND D RL 300
VS
VOUT OUTPUT VOUT CL 35pF 0V
0.9VOUT
0.9VOUT
Figure 31. Enable-to-Output Switching Delay
VDD
VSS VOUT VOUT QINJ = CL x VOUT VOUT CL 1nF VIN
VDD RS VS Sx
VSS D
SW OFF SW ON
SW OFF
DECODER GND
EN
Figure 32. Charge Injection
Rev. 0 | Page 15 of 20
07982-026
A1 A2
VIN
SW OFF
SW OFF
07982-025
tON (EN)
tOFF (EN)
ADG1604 TERMINOLOGY
IDD The positive supply current. ISS The negative supply current. VD (VS) The analog voltage on Terminal D and Terminal S. RON The ohmic resistance between Terminal D and Terminal S. RFLAT(ON) Flatness that is defined as the difference between the maximum and minimum value of on resistance measured over the specified analog signal range. IS (Off) The source leakage current with the switch off. ID (Off) The drain leakage current with the switch off. ID, IS (On) The channel leakage current with the switch on. VINL The maximum input voltage for Logic 0. VINH The minimum input voltage for Logic 1. IINL (IINH) The input current of the digital input. CS (Off) The off switch source capacitance, which is measured with reference to ground. CD (Off) The off switch drain capacitance, which is measured with reference to ground. CD, CS (On) The on switch capacitance, which is measured with reference to ground. CIN The digital input capacitance. tTRANSITION The delay time between the 50% and 90% points of the digital input and switch on condition when switching from one address state to another. tON (EN) The delay between applying the digital control input and the output switching on. See Figure 31. tOFF (EN) The delay between applying the digital control input and the output switching off. See Figure 31. Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during switching. Off Isolation A measure of unwanted signal coupling through an off switch. Crosstalk A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. Bandwidth The frequency at which the output is attenuated by 3 dB. On Response The frequency response of the on switch. Insertion Loss The loss due to the on resistance of the switch. Total Harmonic Distorition + Noise (THD + N) The ratio of the harmonic amplitude plus noise of the signal to the fundamental. AC Power Supply Rejection Ratio (ACPSRR) The ratio of the amplitude of signal on the output to the amplitude of the modulation. This is a measure of the ability of the part to avoid coupling noise and spurious signals that appear on the supply voltage pin to the output of the switch. The dc voltage on the device is modulated by a sine wave of 0.62 V p-p.
Rev. 0 | Page 16 of 20
ADG1604 OUTLINE DIMENSIONS
5.10 5.00 4.90
14
8
4.50 4.40 4.30
1 7
6.40 BSC
PIN 1 0.65 BSC 1.05 1.00 0.80 0.15 0.05 COPLANARITY 0.10 1.20 MAX
0.20 0.09 8 0
0.30 0.19
SEATING PLANE
0.75 0.60 0.45
061908-A
COMPLIANT TO JEDEC STANDARDS MO-153-AB-1
Figure 33. 14-Lead Thin Shrink Small Outline Package [TSSOP] (RU-14) Dimensions shown in millimeters
0.50 0.40 0.30
4.00 BSC SQ
0.60 MAX
PIN 1 INDICATOR
12 13
16
1
PIN 1 INDICATOR
3.75 BSC SQ 0.65 BSC TOP VIEW
9
EXPOSED PAD
4 8 5
2.65 2.50 SQ 2.35 0.25 MIN
1.95 BCS 0.80 MAX 0.65 TYP BOT TOM VIEW FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET.
COMPLIANT TO JEDEC STANDARDS MO-220-VGGC.
Figure 34. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 4 mm x 4 mm Body, Very Thin Quad (CP-16-13) Dimensions shown in millimeters
ORDERING GUIDE
Model ADG1604BRUZ 1 ADG1604BRUZ-REEL1 ADG1604BRUZ-REEL71 ADG1604BCPZ- REEL1 ADG1604BCPZ-REEL71
1
Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C
Package Description 14-Lead Thin Shrink Small Outline Package [TSSOP] 14-Lead Thin Shrink Small Outline Package [TSSOP] 14-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
031006-A
12 MAX 1.00 0.85 0.80 SEATING 0.30 PLANE 0.23 0.18
0.05 MAX 0.02 NOM COPLANARITY 0.20 REF 0.08
Package Option RU-14 RU-14 RU-14 CP-16-13 CP-16-13
Z = RoHS Compliant Part.
Rev. 0 | Page 17 of 20
ADG1604 NOTES
Rev. 0 | Page 18 of 20
ADG1604 NOTES
Rev. 0 | Page 19 of 20
ADG1604 NOTES
(c)2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07982-0-1/09(0)
Rev. 0 | Page 20 of 20

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